MINSU CHOI

Associate Professor
134 Emerson Electric Co. Hall
Rolla, MO 65409-0040
Phone: 573-341-4524
Fax: 573-341-4532
choim@mst.edu

Areas Of Interest

  • Computer architecture & VLSI
  • Embedded systems
  • Fault tolerance
  • Testing
  • Quality assurance
  • Reliability modeling & analysis
  • Configurable computing
  • Distributed systems
  • Dependable instrumentation & measurement

Bio

Minsu Choi received his Ph.D. degree from Oklahoma State University in 2002. Then, he joined the Department of Electrical and Computer Engineering at Missouri University of Science & Technology in 2003.
His research mainly focuses on High-performance computer Architecture & VLSI, Heterogeneous computing, Trustworthy computing, Embedded Systems, Fault Tolerance, Reliability Modeling and Analysis, Configurable Computing, Parallel & Distributed Systems, Dependable Instrumentation & Measurement. He is a senior member of IEEE and a member of ACM, KSEA, Sigma Xi and Golden Key.

 

Education

  • Ph.D. in Computer Science, Oklahoma State University, Aug 02 Dissertation Title: System-on-Chip Design for Reliability OSU Research Excellence Award Recipient
  • M.S. in Computer Science, Oklahoma State University, May 98
  • B.S. in Computer Science, Oklahoma State University, May 95

 

Selected Publications

Journal Articles

  • Veeresh Hongal, Raghavendra Kotikalapudi and Minsu Choi, Design, Test and Repair of MLUT (Memristor Look-Up Table) Based Asynchronous Nanowire Reconfigurable Crossbar Architecture, IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 4, No. 4, pp. 427-437, October, 2014.
  • Byunghyun Jang, Minsu Choi and Kyung Ki Kim, Algorithmic GPGPU Memory Optimization, Journal of Semiconductor Technology and Science, Vol. 14, No. 4, pp. 391-406, August, 2014.
  • Siva Kotipalli, Yong-Bin Kim and Minsu Choi, Asynchronous AES (Advanced Encryption Standard) Hardware with Random Noise Injection for Improved Side-Channel Attack Resistance, Journal of Electrical and Computer Engineering, Vol. 2014, Article ID 837572, 13 pages, 2014.

Conference Articles
  • Prashanthi Metku, Ramu Seva, Kyung Ki Kim and Minsu Choi, Multi-stage BCH decoder to mitigate hotspot-induced bit error variation, 2015 IEEE International SoC Design Conference (ISOCC), pp. 47-48, Nov 2015.
  • Manoj Vishwanathan, Ranak Shah, Kyung Ki Kim and Minsu Choi, Silent data corruption (SDC) vulnerability of GPU on various GPGPU workloads, 2015 IEEE International SoC Design Conference (ISOCC), pp. 11-12, Nov 2015.
  • Byunghyun Jang, Jin Kyung Lee, Minsu Choi and Kyung Ki Kim, On-chip Aging Prediction Circuit in Nanometer Digital Circuits, 2014 International SoC Design Conference, pp.21-22, Nov. 3-6, Jeju, Korea.
  • Minsu Choi, Byung-Ho Kang, Yong-Bin Kim and Kyung Ki Kim, Asynchronous Circuit Design using New High Speed NCL Gates, 2014 International SoC Design Conference, pp.13-14, Nov. 3-6, Jeju, Korea.
  • RajashekharModugu, Yong-Bin Kim,Minsu Choi and Kyung Ki Kim,Modulo 2n+1 Squarer Design for Efficient Hardware Implementation, 2014 International SoC Design Conference, pp.17-18, Nov. 3-6, Jeju, Korea.
  • Jun Wu, Hengsi Qin, Yiyu Shi, Kyung Ki Kim, Ho Joon Lee, Yong-Bin Kim and Minsu Choi, Stochastic Encoding for Enhanced Resistance against Power Analysis Attacks in Crypto- Hardware, 2014 International Industrial Information Systems Conference, pp. 7-9, Jan 2014.


Selected Awards

  • Nominated for best student paper award, Prashanthi Metku, Ramu Seva, Kyung Ki Kim and Minsu Choi, Multi-stage BCH decoder to mitigate hotspot-induced bit error variation, 2015 IEEE International SoC Design Conference (ISOCC), pp. 47-48, Nov 2015.
  • Appreciation Award, IEIE (The Institute of Electronics and Information Engineers) of Korea – for organizing a workshop on 3D integrated heterogeneous processor, 2014.
  • Samsung Best Paper Award, ISOCC, 2013.
  • Outstanding Teaching Award, MST, 2007-08.
  • Outstanding Teaching Award, UMR, 2006-07.
  • Outstanding Advisor Award, Nominee, UMR, 2007.